Z80 Instruction Set — Undocumented

IXH Register

By preceding the following instructions with .DB $DD, the operation will use the MSB of the IX register instead of H.

ADD A,H
AND H
CP H
DEC H
INC H
LD reg₈,H
LD H,reg₈
LD H,imm₈
OR H
SBC A,H
SUB H
XOR H

IXL Register

By preceding the following instructions with .DB $DD, the operation will use the LSB of the IX register instead of L.

ADD A,L
AND L
CP L
DEC L
INC L
LD reg₈,L
LD L,reg₈
LD L,imm₈
OR L
SBC A,L
SUB L
XOR L

IYH Register

By preceding the following instructions with .DB $FD, the operation will use the MSB of the IY register instead of H.

ADD A,H
AND H
CP H
DEC H
INC H
LD reg₈,H
LD H,reg₈
LD H,imm₈
OR H
SBC A,H
SUB H
XOR H

IYL Register

By preceding the following instructions with .DB $FD, the operation will use the LSB of the IY register instead of L.

ADD A,L
AND L
CP L
DEC L
INC L
LD reg₈,L
LD L,reg₈
LD L,imm₈
OR L
SBC A,L
SUB L
XOR L

IN

IN (C)

Operation	Inputs a byte from port C and affects flags only.
Op Code	11101101 : 01110000
Flags	S Z are affected as defined H N are reset P/V is parity C is not affected
T States	12

OUT

OUT (C),0

Operation	Outputs a zero to port C.
Op Code	11101101 : 01110001
T States	12

SLL

SLL reg₈

Operation	The contents of reg8 are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0.
Op Code	11001011 : 00110[reg8] Register Bit Field A 111 B 000 C 001 D 010 E 011 H 100 L 101 (HL) 110
Flags	S Z are affected as defined H N are reset P/V is parity See instruction for C
T States	8 or 15 (HL)

SLL (reg_index + ofs₈)

Operation	The contents of the memory location pointed to by regindex plus ofs8 are shifted left one bit position. The contents of bit 7 are put into the carry and a one is put into bit 0.
Op Code	[regindex] : 11001011 : [ofs8] : 00110110 Register Bit Field IX 11011101 IY 11111101
Flags	S Z are affected as defined H N are reset P/V is parity See instruction for C
T States	23

Autocopy Instructions

Each autocopy instruction performs an operation on a byte in memory referenced by an index register. After this operation is done, the result is then copied to an 8-bit register. Even if the byte is read-only, the register still holds the modified result.

	RL	reg8,(regindex + ofs8)
	RLC	reg8,(regindex + ofs8)
	RR	reg8,(regindex + ofs8)
	RRC	reg8,(regindex + ofs8)
	SLA	reg8,(regindex + ofs8)
	SLL	reg8,(regindex + ofs8)
	SRA	reg8,(regindex + ofs8)
	SRL	reg8,(regindex + ofs8)

	RES	reg8,imm3,(regindex + ofs8)
	SET	reg8,imm3,(regindex + ofs8)

1. Take the opcode for the non-autocopy version. E.g. in the case of RL C,(IX + 2), the opcode is the one for RL (IX + 2):
   11011101 : 11001011 : 00000010 : 00010110
2. Change the last three bits of the last byte of the opcode to the bit field corresponding to reg₈:

   Register	Bit Field
   A	111
   B	000
   C	001
   D	010
   E	011
   H	100
   L	101
   (regindex) (no autocopy)	110

   The final opcode for RL C,(IX + 2) is then
   11011101 : 11001011 : 00000010 : 00010001

Aliases

The following opcodes mimic certain instructions. There could be some SMC potential here.
I really should point out, that some of these opcodes might be labelled wrong. My advice would be to stay the hell away from all of these.

This opcode mimics LD HL,(imm₁₆)

11101101 : 01100011 : [immLSB] : [immMSB]

11101101 : 01101011 : [immLSB] : [immMSB]

$4C	$54	$5C	$64	$6C	$74	$7C

$55	$5D	$65	$6D	$75	$7D

$00-$3F	$80-$9F	$A4-$A7	$AC-$AF	$B4-$B7
$BC-$BF	$C0-$FF	$4E	$66	$6E
$76	$77	$7E	$7F